This is one of the users at Freelancer.com. If you wish to post your own project or become a service provider please signup here.
Username:
srajita
Last Login:
More than 1 week ago.
Name/Company:
EDA
Country:
India
City:
Mumbai
Area of Expertise:
Member Since:
04-06-2008 10:03 EDT
Vision:
Skills:
FPGA/CPLD based digital designs
ASIC design, Verification, Simulation
VHDL, Verilog-HDL, language
MATLAB, C, C++ software language
Keywords:
FPGA,CPLD,PDAs, digital,Electronics, ASIC, VHDL, Verilog, MATLAB,
Average Pricing:
$10/hour
Rating:
(No Feedback Yet)
I have an extensive and versatile experience in digital circuit designs for ASIC, FPGA, and CPLD based digital designs. I am well profficient in VHDL and Verilog-Hardware discription languages. Esteemed precise and accurace of test bench styles and coverage, in verilog_HDL and VHDL. I have also an fairly potent knowledge of C/C++ software coding and MATLAB software language and MATLAB tools. I am post graduate in Electronics discipline from a very recongnized university. Also well versed in the Analog circuit designs.
Buyer Rating:
(No Feedback Yet)
Latest Open Projects:
(No Open Projects)
Latest Frozen Projects:
(No Frozen Projects)
Latest Closed Projects:
(No Closed Projects)
Provider Rating:
(No Feedback Yet)
Latest Bids on Projects:
(No Active Bids On Projects)
Latest Won Projects:
(No Won Projects)
Latest Lost Projects: